Architecture
◆ 9 termsClick any term to reveal details, related terms, and internal documentation.
Token-based access model: read, write, execute, manage. Capabilities are unforgeable, transferable, and revocable. Implemented in helix-core.
5 classes: Realtime (EDF), System, Interactive (CFS-like), Batch (FIFO), Idle. Per-CPU runqueues, O(1) dispatch. ~8K LoC.
Supports x86_64, AArch64, RISC-V. Traits: CpuHal, MmuHal, InterruptHal, TimerHal, FirmwareHal. Platform-specific implementations behind #[cfg].
Central nervous system of the kernel. Manages: event bus (pub/sub, 9 topics), message router, module registry (max 256), panic handler, self-heal.
HHDM (Higher-Half Direct Map) provides identity-like mapping offset by constant. Simplifies virtual↔physical address translation.
State transfer protocol: serialize old state → load new module → deserialize. Verification: checksum, ABI version, capability re-validation. ~3ms average swap time.
Models: Decision Tree (1200 nodes), Random Forest (50×24), Neural Network (3 layers, 128 neurons), SVM (RBF). Health monitoring at 100ms heartbeat. Level L2: Predictive.
Term Connections
How Helix OS concepts relate to each other
Architecture
9 terms · 25 links
Memory
10 terms · 23 links
Scheduling
8 terms · 18 links
Filesystem
10 terms · 21 links
Hardware
9 terms · 22 links
IPC & Boot
8 terms · 16 links
Security
5 terms · 10 links
Rust / Kernel Dev
6 terms · 9 links
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